[X86_64] Smaller code for sub_ir when register is accumulator.
authorakling@apple.com <akling@apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Mon, 10 Mar 2014 18:57:14 +0000 (18:57 +0000)
committerakling@apple.com <akling@apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Mon, 10 Mar 2014 18:57:14 +0000 (18:57 +0000)
<https://webkit.org/b/130025>

Generate the shorthand version of "sub eax, imm" when possible.

Reviewed by Michael Saboff.

* assembler/X86Assembler.h:
(JSC::X86Assembler::subl_ir):
(JSC::X86Assembler::subq_ir):

git-svn-id: https://svn.webkit.org/repository/webkit/trunk@165391 268f45cc-cd09-0410-ab3c-d52691b4dbfc

Source/JavaScriptCore/ChangeLog
Source/JavaScriptCore/assembler/X86Assembler.h

index c5db9220205c1f6431feec8064e1bdba5e333366..703801d3f852428f3602c21347cc7ed64c72ca93 100644 (file)
@@ -1,3 +1,16 @@
+2014-03-10  Andreas Kling  <akling@apple.com>
+
+        [X86_64] Smaller code for sub_ir when register is accumulator.
+        <https://webkit.org/b/130025>
+
+        Generate the shorthand version of "sub eax, imm" when possible.
+
+        Reviewed by Michael Saboff.
+
+        * assembler/X86Assembler.h:
+        (JSC::X86Assembler::subl_ir):
+        (JSC::X86Assembler::subq_ir):
+
 2014-03-10  Andreas Kling  <akling@apple.com>
 
         [X86_64] Smaller code for add_ir when register is accumulator.
index c81936c8ec6fd48f6c8f8141fe07a3589bfd506a..60484a93a2b2ab9d98cc5067f31357e19b6e8d5f 100644 (file)
@@ -197,6 +197,7 @@ private:
         OP_AND_GvEv                     = 0x23,
         OP_SUB_EvGv                     = 0x29,
         OP_SUB_GvEv                     = 0x2B,
+        OP_SUB_EAXIv                    = 0x2D,
         PRE_PREDICT_BRANCH_NOT_TAKEN    = 0x2E,
         OP_XOR_EvGv                     = 0x31,
         OP_XOR_GvEv                     = 0x33,
@@ -701,7 +702,10 @@ public:
             m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_SUB, dst);
             m_formatter.immediate8(imm);
         } else {
-            m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_SUB, dst);
+            if (dst == X86Registers::eax)
+                m_formatter.oneByteOp(OP_SUB_EAXIv);
+            else
+                m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_SUB, dst);
             m_formatter.immediate32(imm);
         }
     }
@@ -729,7 +733,10 @@ public:
             m_formatter.oneByteOp64(OP_GROUP1_EvIb, GROUP1_OP_SUB, dst);
             m_formatter.immediate8(imm);
         } else {
-            m_formatter.oneByteOp64(OP_GROUP1_EvIz, GROUP1_OP_SUB, dst);
+            if (dst == X86Registers::eax)
+                m_formatter.oneByteOp64(OP_SUB_EAXIv);
+            else
+                m_formatter.oneByteOp64(OP_GROUP1_EvIz, GROUP1_OP_SUB, dst);
             m_formatter.immediate32(imm);
         }
     }