[X86_64] Smaller code for xor_ir when register is accumulator.
authorakling@apple.com <akling@apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Mon, 10 Mar 2014 10:06:01 +0000 (10:06 +0000)
committerakling@apple.com <akling@apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Mon, 10 Mar 2014 10:06:01 +0000 (10:06 +0000)
<https://webkit.org/b/130008>

Generate the shorthand version of "xor eax, imm" when possible.

Reviewed by Benjamin Poulain.

* assembler/X86Assembler.h:
(JSC::X86Assembler::xorl_ir):
(JSC::X86Assembler::xorq_ir):

git-svn-id: https://svn.webkit.org/repository/webkit/trunk@165370 268f45cc-cd09-0410-ab3c-d52691b4dbfc

Source/JavaScriptCore/ChangeLog
Source/JavaScriptCore/assembler/X86Assembler.h

index 47c3f442eeb461504823038dd9531b134633df46..80ed1589ca61abc6932b8d57331ab38062dab7fa 100644 (file)
@@ -1,3 +1,16 @@
+2014-03-10  Andreas Kling  <akling@apple.com>
+
+        [X86_64] Smaller code for xor_ir when register is accumulator.
+        <https://webkit.org/b/130008>
+
+        Generate the shorthand version of "xor eax, imm" when possible.
+
+        Reviewed by Benjamin Poulain.
+
+        * assembler/X86Assembler.h:
+        (JSC::X86Assembler::xorl_ir):
+        (JSC::X86Assembler::xorq_ir):
+
 2014-03-10  Andreas Kling  <akling@apple.com>
 
         [X86_64] Smaller code for or_ir when register is accumulator.
index 09972c001e9b75d3b5f6a1ee4b2a9a7e0c2690fe..44d6cbb52127ec2271de8e440fc109bb374563e4 100644 (file)
@@ -199,6 +199,7 @@ private:
         PRE_PREDICT_BRANCH_NOT_TAKEN    = 0x2E,
         OP_XOR_EvGv                     = 0x31,
         OP_XOR_GvEv                     = 0x33,
+        OP_XOR_EAXIv                    = 0x35,
         OP_CMP_EvGv                     = 0x39,
         OP_CMP_GvEv                     = 0x3B,
         OP_CMP_EAXIv                    = 0x3D,
@@ -770,7 +771,10 @@ public:
             m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_XOR, dst);
             m_formatter.immediate8(imm);
         } else {
-            m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_XOR, dst);
+            if (dst == X86Registers::eax)
+                m_formatter.oneByteOp(OP_XOR_EAXIv);
+            else
+                m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_XOR, dst);
             m_formatter.immediate32(imm);
         }
     }
@@ -787,7 +791,10 @@ public:
             m_formatter.oneByteOp64(OP_GROUP1_EvIb, GROUP1_OP_XOR, dst);
             m_formatter.immediate8(imm);
         } else {
-            m_formatter.oneByteOp64(OP_GROUP1_EvIz, GROUP1_OP_XOR, dst);
+            if (dst == X86Registers::eax)
+                m_formatter.oneByteOp64(OP_XOR_EAXIv);
+            else
+                m_formatter.oneByteOp64(OP_GROUP1_EvIz, GROUP1_OP_XOR, dst);
             m_formatter.immediate32(imm);
         }
     }