MIPS+Armv7 builds are broken since r229391
authorguijemont@igalia.com <guijemont@igalia.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Tue, 20 Mar 2018 20:37:46 +0000 (20:37 +0000)
committerguijemont@igalia.com <guijemont@igalia.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Tue, 20 Mar 2018 20:37:46 +0000 (20:37 +0000)
https://bugs.webkit.org/show_bug.cgi?id=183474

Reviewed by Yusuke Suzuki.

Add missing armv7 and mips operations and fix arguments to a call to
operationGetByValCell. This should fix compilation on MIPS and Armv7
(though it does not implement the missing setupArguments stuff in
CCallHelpers).

* assembler/MacroAssembler.h:
* assembler/MacroAssemblerARMv7.h:
(JSC::MacroAssemblerARMv7::swap):
* assembler/MacroAssemblerMIPS.h:
(JSC::MacroAssemblerMIPS::swap):
* dfg/DFGSpeculativeJIT32_64.cpp:
(JSC::DFG::SpeculativeJIT::compile):
* jit/FPRInfo.h:

git-svn-id: https://svn.webkit.org/repository/webkit/trunk@229772 268f45cc-cd09-0410-ab3c-d52691b4dbfc

Source/JavaScriptCore/ChangeLog
Source/JavaScriptCore/assembler/MacroAssembler.h
Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h
Source/JavaScriptCore/assembler/MacroAssemblerMIPS.h
Source/JavaScriptCore/dfg/DFGSpeculativeJIT32_64.cpp
Source/JavaScriptCore/jit/FPRInfo.h

index 0b57061..65df730 100644 (file)
@@ -1,3 +1,24 @@
+2018-03-20  Guillaume Emont  <guijemont@igalia.com>
+
+        MIPS+Armv7 builds are broken since r229391
+        https://bugs.webkit.org/show_bug.cgi?id=183474
+
+        Reviewed by Yusuke Suzuki.
+
+        Add missing armv7 and mips operations and fix arguments to a call to
+        operationGetByValCell. This should fix compilation on MIPS and Armv7
+        (though it does not implement the missing setupArguments stuff in
+        CCallHelpers).
+
+        * assembler/MacroAssembler.h:
+        * assembler/MacroAssemblerARMv7.h:
+        (JSC::MacroAssemblerARMv7::swap):
+        * assembler/MacroAssemblerMIPS.h:
+        (JSC::MacroAssemblerMIPS::swap):
+        * dfg/DFGSpeculativeJIT32_64.cpp:
+        (JSC::DFG::SpeculativeJIT::compile):
+        * jit/FPRInfo.h:
+
 2018-03-20  Tim Horton  <timothy_horton@apple.com>
 
         Add and adopt WK_PLATFORM_NAME and adjust default feature defines
index bfb706c..d25da3c 100644 (file)
@@ -355,14 +355,6 @@ public:
         store64(src, addressForPoke(index));
     }
 #endif
-    
-#if CPU(MIPS)
-    void poke(FPRegisterID src, int index = 0)
-    {
-        ASSERT(!(index & 1));
-        storeDouble(src, addressForPoke(index));
-    }
-#endif
 
     // Immediate shifts only have 5 controllable bits
     // so we'll consider them safe for now.
index 77d4ff0..76f4efc 100644 (file)
@@ -1339,6 +1339,13 @@ public:
         move(dataTempRegister, reg2);
     }
 
+    void swap(FPRegisterID fr1, FPRegisterID fr2)
+    {
+        moveDouble(fr1, fpTempRegister);
+        moveDouble(fr2, fr1);
+        moveDouble(fpTempRegister, fr2);
+    }
+
     void signExtend32ToPtr(RegisterID src, RegisterID dest)
     {
         move(src, dest);
index 234c5c3..a9ce4b0 100644 (file)
@@ -2917,7 +2917,7 @@ public:
         convertInt32ToDouble(MIPSRegisters::zero, reg);
     }
 
-    void swapDouble(FPRegisterID fr1, FPRegisterID fr2)
+    void swap(FPRegisterID fr1, FPRegisterID fr2)
     {
         moveDouble(fr1, fpTempRegister);
         moveDouble(fr2, fr1);
index 4391454..d81a5ef 100644 (file)
@@ -4976,7 +4976,7 @@ void SpeculativeJIT::compile(Node* node)
 
         done.link(&m_jit);
 
-        addSlowPathGenerator(slowPathCall(slowPath, this, operationGetByValCell, resultRegs, baseGPR, propertyGPR));
+        addSlowPathGenerator(slowPathCall(slowPath, this, operationGetByValCell, resultRegs, baseGPR, JSValue::JSCellType, propertyGPR));
 #endif
 
         jsValueResult(resultRegs, node);
index 9852078..6ff8249 100644 (file)
@@ -256,6 +256,7 @@ class FPRInfo {
 public:
     typedef FPRReg RegisterType;
     static const unsigned numberOfRegisters = 7;
+    static const unsigned numberOfArgumentRegisters = 2;
 
     // Temporary registers.
     static const FPRReg fpRegT0 = MIPSRegisters::f0;