[sh4] Fix double floating point transfer in baseline JIT.
authorcommit-queue@webkit.org <commit-queue@webkit.org@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Fri, 31 May 2013 18:21:23 +0000 (18:21 +0000)
committercommit-queue@webkit.org <commit-queue@webkit.org@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Fri, 31 May 2013 18:21:23 +0000 (18:21 +0000)
https://bugs.webkit.org/show_bug.cgi?id=117054

Patch by Julien Brianceau <jbrianceau@nds.com> on 2013-05-31
Reviewed by Oliver Hunt.

In current implementation, dmovRegReg function transfers only one single
FPRegister as PR=1 and SZ=0 in floating point status/control register.
Double transfers must be performed with two fmov.s opcodes.

* assembler/MacroAssemblerSH4.h:
(JSC::MacroAssemblerSH4::moveDouble):
(JSC::MacroAssemblerSH4::addDouble): Handle (op2==dest) case properly.
(JSC::MacroAssemblerSH4::sqrtDouble):
* assembler/SH4Assembler.h:
(JSC::SH4Assembler::fmovsRegReg):

git-svn-id: https://svn.webkit.org/repository/webkit/trunk@151031 268f45cc-cd09-0410-ab3c-d52691b4dbfc

Source/JavaScriptCore/ChangeLog
Source/JavaScriptCore/assembler/MacroAssemblerSH4.h
Source/JavaScriptCore/assembler/SH4Assembler.h

index 22b1088..7f5b97b 100644 (file)
@@ -1,5 +1,23 @@
 2013-05-31  Julien Brianceau  <jbrianceau@nds.com>
 
+        [sh4] Fix double floating point transfer in baseline JIT.
+        https://bugs.webkit.org/show_bug.cgi?id=117054
+
+        Reviewed by Oliver Hunt.
+
+        In current implementation, dmovRegReg function transfers only one single
+        FPRegister as PR=1 and SZ=0 in floating point status/control register.
+        Double transfers must be performed with two fmov.s opcodes.
+
+        * assembler/MacroAssemblerSH4.h:
+        (JSC::MacroAssemblerSH4::moveDouble):
+        (JSC::MacroAssemblerSH4::addDouble): Handle (op2==dest) case properly.
+        (JSC::MacroAssemblerSH4::sqrtDouble):
+        * assembler/SH4Assembler.h:
+        (JSC::SH4Assembler::fmovsRegReg):
+
+2013-05-31  Julien Brianceau  <jbrianceau@nds.com>
+
         [sh4] Handle branchType properly in branchTruncateDoubleToInt32.
         https://bugs.webkit.org/show_bug.cgi?id=117062
 
index aaca073..3a090fc 100644 (file)
@@ -965,6 +965,14 @@ public:
         m_assembler.fstsfpul(dest);
     }
 
+    void moveDouble(FPRegisterID src, FPRegisterID dest)
+    {
+        if (src != dest) {
+            m_assembler.fmovsRegReg((FPRegisterID)(src + 1), (FPRegisterID)(dest + 1));
+            m_assembler.fmovsRegReg(src, dest);
+        }
+    }
+
     void loadFloat(BaseIndex address, FPRegisterID dest)
     {
         RegisterID scr = claimScratch();
@@ -1065,10 +1073,10 @@ public:
     void addDouble(FPRegisterID op1, FPRegisterID op2, FPRegisterID dest)
     {
         if (op1 == dest)
-            m_assembler.daddRegReg(op2, dest);
+            addDouble(op2, dest);
         else {
-            m_assembler.dmovRegReg(op1, dest);
-            m_assembler.daddRegReg(op2, dest);
+            moveDouble(op2, dest);
+            addDouble(op1, dest);
         }
     }
 
@@ -1440,8 +1448,7 @@ public:
 
     void sqrtDouble(FPRegisterID src, FPRegisterID dest)
     {
-        if (dest != src)
-            m_assembler.dmovRegReg(src, dest);
+        moveDouble(src, dest);
         m_assembler.dsqrt(dest);
     }
     
index a749b13..cfa8e78 100644 (file)
@@ -829,6 +829,12 @@ public:
         oneShortOp(opc, true, false);
     }
 
+    void fmovsRegReg(FPRegisterID src, FPRegisterID dst)
+    {
+        uint16_t opc = getOpcodeGroup1(FMOV_OPCODE, dst, src);
+        oneShortOp(opc, true, false);
+    }
+
     void fmovsReadrm(RegisterID src, FPRegisterID dst)
     {
         uint16_t opc = getOpcodeGroup1(FMOVS_READ_RM_OPCODE, dst, src);