Get rid of the regT* definitions in JSInterfaceJIT.h.
authormark.lam@apple.com <mark.lam@apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Fri, 8 Nov 2013 04:05:27 +0000 (04:05 +0000)
committermark.lam@apple.com <mark.lam@apple.com@268f45cc-cd09-0410-ab3c-d52691b4dbfc>
Fri, 8 Nov 2013 04:05:27 +0000 (04:05 +0000)
https://bugs.webkit.org/show_bug.cgi?id=123806.

Reviewed by Geoffrey Garen.

JSInterfaceJIT now inherits from GPRInfo and FPRInfo, and relies on them
to provide all the register definitions.

* jit/GPRInfo.h:
(JSC::GPRInfo::toArgumentRegister):
* jit/JIT.cpp:
(JSC::JIT::emitEnterOptimizationCheck):
(JSC::JIT::privateCompile):
* jit/JITArithmetic.cpp:
(JSC::JIT::emit_compareAndJumpSlow):
* jit/JITArithmetic32_64.cpp:
(JSC::JIT::emit_compareAndJumpSlow):
* jit/JITCall.cpp:
(JSC::JIT::compileLoadVarargs):
* jit/JITCall32_64.cpp:
(JSC::JIT::compileLoadVarargs):
* jit/JITInlines.h:
(JSC::JIT::appendCallWithExceptionCheckSetJSValueResult):
(JSC::JIT::appendCallWithExceptionCheckSetJSValueResultWithProfile):
* jit/JITOpcodes.cpp:
(JSC::JIT::emit_op_end):
(JSC::JIT::emitSlow_op_new_object):
(JSC::JIT::emit_op_ret):
(JSC::JIT::emit_op_ret_object_or_this):
(JSC::JIT::emit_op_throw):
(JSC::JIT::emit_op_get_pnames):
(JSC::JIT::emit_op_switch_imm):
(JSC::JIT::emit_op_switch_char):
(JSC::JIT::emit_op_switch_string):
(JSC::JIT::emit_op_create_activation):
(JSC::JIT::emit_op_create_arguments):
(JSC::JIT::emitSlow_op_jfalse):
(JSC::JIT::emitSlow_op_jtrue):
(JSC::JIT::emitSlow_op_eq):
(JSC::JIT::emitSlow_op_neq):
(JSC::JIT::emitSlow_op_get_argument_by_val):
(JSC::JIT::emitSlow_op_loop_hint):
* jit/JITOpcodes32_64.cpp:
(JSC::JIT::privateCompileCTINativeCall):
(JSC::JIT::emit_op_end):
(JSC::JIT::emitSlow_op_new_object):
(JSC::JIT::emitSlow_op_jfalse):
(JSC::JIT::emitSlow_op_jtrue):
(JSC::JIT::emitSlow_op_eq):
(JSC::JIT::emitSlow_op_neq):
(JSC::JIT::emit_op_throw):
(JSC::JIT::emit_op_get_pnames):
(JSC::JIT::emit_op_switch_imm):
(JSC::JIT::emit_op_switch_char):
(JSC::JIT::emit_op_switch_string):
(JSC::JIT::emit_op_create_activation):
(JSC::JIT::emit_op_create_arguments):
(JSC::JIT::emitSlow_op_get_argument_by_val):
* jit/JSInterfaceJIT.h:
(JSC::JSInterfaceJIT::JSInterfaceJIT):
* jit/SlowPathCall.h:
(JSC::JITSlowPathCall::call):
* jit/ThunkGenerators.cpp:

git-svn-id: https://svn.webkit.org/repository/webkit/trunk@158901 268f45cc-cd09-0410-ab3c-d52691b4dbfc

13 files changed:
Source/JavaScriptCore/ChangeLog
Source/JavaScriptCore/jit/GPRInfo.h
Source/JavaScriptCore/jit/JIT.cpp
Source/JavaScriptCore/jit/JITArithmetic.cpp
Source/JavaScriptCore/jit/JITArithmetic32_64.cpp
Source/JavaScriptCore/jit/JITCall.cpp
Source/JavaScriptCore/jit/JITCall32_64.cpp
Source/JavaScriptCore/jit/JITInlines.h
Source/JavaScriptCore/jit/JITOpcodes.cpp
Source/JavaScriptCore/jit/JITOpcodes32_64.cpp
Source/JavaScriptCore/jit/JSInterfaceJIT.h
Source/JavaScriptCore/jit/SlowPathCall.h
Source/JavaScriptCore/jit/ThunkGenerators.cpp

index 9fdf7b3..f7b3ae2 100644 (file)
@@ -1,3 +1,69 @@
+2013-11-07  Mark Lam  <mark.lam@apple.com>
+
+        Get rid of the regT* definitions in JSInterfaceJIT.h.
+        https://bugs.webkit.org/show_bug.cgi?id=123806.
+
+        Reviewed by Geoffrey Garen.
+
+        JSInterfaceJIT now inherits from GPRInfo and FPRInfo, and relies on them
+        to provide all the register definitions.
+
+        * jit/GPRInfo.h:
+        (JSC::GPRInfo::toArgumentRegister):
+        * jit/JIT.cpp:
+        (JSC::JIT::emitEnterOptimizationCheck):
+        (JSC::JIT::privateCompile):
+        * jit/JITArithmetic.cpp:
+        (JSC::JIT::emit_compareAndJumpSlow):
+        * jit/JITArithmetic32_64.cpp:
+        (JSC::JIT::emit_compareAndJumpSlow):
+        * jit/JITCall.cpp:
+        (JSC::JIT::compileLoadVarargs):
+        * jit/JITCall32_64.cpp:
+        (JSC::JIT::compileLoadVarargs):
+        * jit/JITInlines.h:
+        (JSC::JIT::appendCallWithExceptionCheckSetJSValueResult):
+        (JSC::JIT::appendCallWithExceptionCheckSetJSValueResultWithProfile):
+        * jit/JITOpcodes.cpp:
+        (JSC::JIT::emit_op_end):
+        (JSC::JIT::emitSlow_op_new_object):
+        (JSC::JIT::emit_op_ret):
+        (JSC::JIT::emit_op_ret_object_or_this):
+        (JSC::JIT::emit_op_throw):
+        (JSC::JIT::emit_op_get_pnames):
+        (JSC::JIT::emit_op_switch_imm):
+        (JSC::JIT::emit_op_switch_char):
+        (JSC::JIT::emit_op_switch_string):
+        (JSC::JIT::emit_op_create_activation):
+        (JSC::JIT::emit_op_create_arguments):
+        (JSC::JIT::emitSlow_op_jfalse):
+        (JSC::JIT::emitSlow_op_jtrue):
+        (JSC::JIT::emitSlow_op_eq):
+        (JSC::JIT::emitSlow_op_neq):
+        (JSC::JIT::emitSlow_op_get_argument_by_val):
+        (JSC::JIT::emitSlow_op_loop_hint):
+        * jit/JITOpcodes32_64.cpp:
+        (JSC::JIT::privateCompileCTINativeCall):
+        (JSC::JIT::emit_op_end):
+        (JSC::JIT::emitSlow_op_new_object):
+        (JSC::JIT::emitSlow_op_jfalse):
+        (JSC::JIT::emitSlow_op_jtrue):
+        (JSC::JIT::emitSlow_op_eq):
+        (JSC::JIT::emitSlow_op_neq):
+        (JSC::JIT::emit_op_throw):
+        (JSC::JIT::emit_op_get_pnames):
+        (JSC::JIT::emit_op_switch_imm):
+        (JSC::JIT::emit_op_switch_char):
+        (JSC::JIT::emit_op_switch_string):
+        (JSC::JIT::emit_op_create_activation):
+        (JSC::JIT::emit_op_create_arguments):
+        (JSC::JIT::emitSlow_op_get_argument_by_val):
+        * jit/JSInterfaceJIT.h:
+        (JSC::JSInterfaceJIT::JSInterfaceJIT):
+        * jit/SlowPathCall.h:
+        (JSC::JITSlowPathCall::call):
+        * jit/ThunkGenerators.cpp:
+
 2013-11-07  Filip Pizlo  <fpizlo@apple.com>
 
         FTL should support NewArray
index 11530d0..de48766 100644 (file)
@@ -278,6 +278,8 @@ private:
 };
 #endif
 
+// The baseline JIT requires that regT3 be callee-preserved.
+
 #if CPU(X86)
 #define NUMBER_OF_ARGUMENT_REGISTERS 0u
 
@@ -287,6 +289,8 @@ public:
     static const unsigned numberOfRegisters = 6;
     static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
 
+    // Note: regT3 is required to be callee-preserved.
+
     // Temporary registers.
     static const GPRReg regT0 = X86Registers::eax;
     static const GPRReg regT1 = X86Registers::edx;
@@ -343,7 +347,11 @@ private:
 #endif
 
 #if CPU(X86_64)
+#if !OS(WINDOWS)
 #define NUMBER_OF_ARGUMENT_REGISTERS 6u
+#else
+#define NUMBER_OF_ARGUMENT_REGISTERS 4u
+#endif
 
 class GPRInfo {
 public:
@@ -351,6 +359,8 @@ public:
     static const unsigned numberOfRegisters = 10;
     static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
 
+    // Note: regT3 is required to be callee-preserved.
+
     // These registers match the baseline JIT.
     static const GPRReg cachedResultRegister = X86Registers::eax;
     static const GPRReg callFrameRegister = X86Registers::ebp;
@@ -368,12 +378,19 @@ public:
     static const GPRReg regT8 = X86Registers::r10;
     static const GPRReg regT9 = X86Registers::r13;
     // These constants provide the names for the general purpose argument & return value registers.
+#if !OS(WINDOWS)
     static const GPRReg argumentGPR0 = X86Registers::edi; // regT4
     static const GPRReg argumentGPR1 = X86Registers::esi; // regT5
     static const GPRReg argumentGPR2 = X86Registers::edx; // regT1
     static const GPRReg argumentGPR3 = X86Registers::ecx; // regT2
     static const GPRReg argumentGPR4 = X86Registers::r8;  // regT6
     static const GPRReg argumentGPR5 = X86Registers::r9;  // regT7
+#else
+    static const GPRReg argumentGPR0 = X86Registers::ecx;
+    static const GPRReg argumentGPR1 = X86Registers::edx;
+    static const GPRReg argumentGPR2 = X86Registers::r8; // regT6
+    static const GPRReg argumentGPR3 = X86Registers::r9; // regT7
+#endif
     static const GPRReg nonArgGPR0 = X86Registers::eax; // regT0
     static const GPRReg nonArgGPR1 = X86Registers::ebx; // regT3
     static const GPRReg nonArgGPR2 = X86Registers::r10; // regT8
@@ -391,7 +408,11 @@ public:
     static GPRReg toArgumentRegister(unsigned index)
     {
         ASSERT(index < numberOfArgumentRegisters);
+#if !OS(WINDOWS)
         static const GPRReg registerForIndex[numberOfArgumentRegisters] = { argumentGPR0, argumentGPR1, argumentGPR2, argumentGPR3, argumentGPR4, argumentGPR5 };
+#else
+        static const GPRReg registerForIndex[numberOfArgumentRegisters] = { argumentGPR0, argumentGPR1, argumentGPR2, argumentGPR3 };
+#endif
         return registerForIndex[index];
     }
     
@@ -433,6 +454,8 @@ public:
     static const unsigned numberOfRegisters = 10;
     static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
 
+    // Note: regT3 is required to be callee-preserved.
+
     // Temporary registers.
     static const GPRReg regT0 = ARMRegisters::r0;
     static const GPRReg regT1 = ARMRegisters::r1;
@@ -460,6 +483,10 @@ public:
     static const GPRReg returnValueGPR2 = ARMRegisters::r1; // regT1
     static const GPRReg nonPreservedNonReturnGPR = ARMRegisters::r2;
 
+#if ENABLE(VALUE_PROFILER)
+    static const GPRReg bucketCounterRegister = ARMRegisters::r7;
+#endif
+
     static GPRReg toRegister(unsigned index)
     {
         ASSERT(index < numberOfRegisters);
@@ -504,6 +531,8 @@ public:
     typedef GPRReg RegisterType;
     static const unsigned numberOfRegisters = 16;
 
+    // Note: regT3 is required to be callee-preserved.
+
     // These registers match the baseline JIT.
     static const GPRReg cachedResultRegister = ARM64Registers::x0;
     static const GPRReg timeoutCheckRegister = ARM64Registers::x26;
@@ -514,8 +543,8 @@ public:
     static const GPRReg regT0 = ARM64Registers::x0;
     static const GPRReg regT1 = ARM64Registers::x1;
     static const GPRReg regT2 = ARM64Registers::x2;
-    static const GPRReg regT3 = ARM64Registers::x3;
-    static const GPRReg regT4 = ARM64Registers::x4;
+    static const GPRReg regT3 = ARM64Registers::x23;
+    static const GPRReg regT4 = ARM64Registers::x24;
     static const GPRReg regT5 = ARM64Registers::x5;
     static const GPRReg regT6 = ARM64Registers::x6;
     static const GPRReg regT7 = ARM64Registers::x7;
@@ -543,6 +572,10 @@ public:
     static const GPRReg returnValueGPR2 = ARM64Registers::x1; // regT1
     static const GPRReg nonPreservedNonReturnGPR = ARM64Registers::x2;
 
+#if ENABLE(VALUE_PROFILER)
+    static const GPRReg bucketCounterRegister = ARM64Registers::x7;
+#endif
+
     // GPRReg mapping is direct, the machine regsiter numbers can
     // be used directly as indices into the GPR RegisterBank.
     COMPILE_ASSERT(ARM64Registers::q0 == 0, q0_is_0);
@@ -598,6 +631,10 @@ public:
     static const unsigned numberOfRegisters = 7;
     static const unsigned numberOfArgumentRegisters = NUMBER_OF_ARGUMENT_REGISTERS;
 
+    // regT0 must be v0 for returning a 32-bit value.
+    // regT1 must be v1 for returning a pair of 32-bit value.
+    // regT3 must be saved in the callee, so use an S register.
+
     // Temporary registers.
     static const GPRReg regT0 = MIPSRegisters::v0;
     static const GPRReg regT1 = MIPSRegisters::v1;
@@ -670,6 +707,8 @@ public:
     typedef GPRReg RegisterType;
     static const unsigned numberOfRegisters = 10;
 
+    // Note: regT3 is required to be callee-preserved.
+
     // Temporary registers.
     static const GPRReg regT0 = SH4Registers::r0;
     static const GPRReg regT1 = SH4Registers::r1;
@@ -731,6 +770,14 @@ private:
 
 #endif
 
+// The baseline JIT uses "accumulator" style execution with regT0 (for 64-bit)
+// and regT0 + regT1 (for 32-bit) serving as the accumulator register(s) for
+// passing results of one opcode to the next. Hence:
+COMPILE_ASSERT(GPRInfo::regT0 == GPRInfo::returnValueGPR, regT0_must_equal_returnValueGPR);
+#if USE(JSVALUE32_64)
+COMPILE_ASSERT(GPRInfo::regT1 == GPRInfo::returnValueGPR2, regT1_must_equal_returnValueGPR2);
+#endif
+
 } // namespace JSC
 
 namespace WTF {
index 6efa734..6d253c7 100644 (file)
@@ -109,8 +109,8 @@ void JIT::emitEnterOptimizationCheck()
     skipOptimize.append(branchAdd32(Signed, TrustedImm32(Options::executionCounterIncrementForEntry()), AbsoluteAddress(m_codeBlock->addressOfJITExecuteCounter())));
     ASSERT(!m_bytecodeOffset);
     callOperation(operationOptimize, m_bytecodeOffset);
-    skipOptimize.append(branchTestPtr(Zero, returnValueRegister));
-    jump(returnValueRegister);
+    skipOptimize.append(branchTestPtr(Zero, returnValueGPR));
+    jump(returnValueGPR);
     skipOptimize.link(this);
 }
 #endif
@@ -621,8 +621,8 @@ CompilationResult JIT::privateCompile(JITCompilationEffort effort)
         m_bytecodeOffset = 0;
 
         callOperationWithCallFrameRollbackOnException(m_codeBlock->m_isConstructor ? operationConstructArityCheck : operationCallArityCheck);
-        if (returnValueRegister != regT0)
-            move(returnValueRegister, regT0);
+        if (returnValueGPR != regT0)
+            move(returnValueGPR, regT0);
         branchTest32(Zero, regT0).linkTo(beginLabel, this);
         emitNakedCall(m_vm->getCTIStub(arityFixup).code());
 
index 2bc7193..7993117 100644 (file)
@@ -477,10 +477,10 @@ void JIT::emit_compareAndJumpSlow(int op1, int op2, unsigned target, DoubleCondi
         linkSlowCase(iter);
         linkSlowCase(iter);
 
-        emitGetVirtualRegister(op1, firstArgumentRegister);
-        emitGetVirtualRegister(op2, secondArgumentRegister);
-        callOperation(operation, firstArgumentRegister, secondArgumentRegister);
-        emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, returnValueRegister), target);
+        emitGetVirtualRegister(op1, argumentGPR0);
+        emitGetVirtualRegister(op2, argumentGPR1);
+        callOperation(operation, argumentGPR0, argumentGPR1);
+        emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, returnValueGPR), target);
         return;
     }
 
@@ -506,7 +506,7 @@ void JIT::emit_compareAndJumpSlow(int op1, int op2, unsigned target, DoubleCondi
 
         emitGetVirtualRegister(op2, regT1);
         callOperation(operation, regT0, regT1);
-        emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, returnValueRegister), target);
+        emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, returnValueGPR), target);
     } else if (isOperandConstantImmediateInt(op1)) {
         linkSlowCase(iter);
 
@@ -529,7 +529,7 @@ void JIT::emit_compareAndJumpSlow(int op1, int op2, unsigned target, DoubleCondi
 
         emitGetVirtualRegister(op1, regT2);
         callOperation(operation, regT2, regT1);
-        emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, returnValueRegister), target);
+        emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, returnValueGPR), target);
     } else {
         linkSlowCase(iter);
 
@@ -553,7 +553,7 @@ void JIT::emit_compareAndJumpSlow(int op1, int op2, unsigned target, DoubleCondi
 
         linkSlowCase(iter);
         callOperation(operation, regT0, regT1);
-        emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, returnValueRegister), target);
+        emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, returnValueGPR), target);
     }
 }
 
index 8167bae..9b8f046 100644 (file)
@@ -160,7 +160,7 @@ void JIT::emit_compareAndJumpSlow(int op1, int op2, unsigned target, DoubleCondi
     emitLoad(op1, regT1, regT0);
     emitLoad(op2, regT3, regT2);
     callOperation(operation, regT1, regT0, regT3, regT2);
-    emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, returnValueRegister), target);
+    emitJumpSlowToHot(branchTest32(invert ? Zero : NonZero, returnValueGPR), target);
 }
 
 // LeftShift (<<)
index 6c920c0..9b68db2 100644 (file)
@@ -121,7 +121,7 @@ void JIT::compileLoadVarargs(Instruction* instruction)
     emitGetVirtualRegister(thisValue, regT0);
     emitGetVirtualRegister(arguments, regT1);
     callOperation(operationLoadVarargs, regT0, regT1, firstFreeRegister);
-    move(returnValueRegister, regT1);
+    move(returnValueGPR, regT1);
 
     if (canOptimize)
         end.link(this);
index c335ced..9f63492 100644 (file)
@@ -192,7 +192,7 @@ void JIT::compileLoadVarargs(Instruction* instruction)
     emitLoad(thisValue, regT1, regT0);
     emitLoad(arguments, regT3, regT2);
     callOperation(operationLoadVarargs, regT1, regT0, regT3, regT2, firstFreeRegister);
-    move(returnValueRegister, regT3);
+    move(returnValueGPR, regT3);
 
     if (canOptimize)
         end.link(this);
index d76969f..0782357 100644 (file)
@@ -149,9 +149,9 @@ ALWAYS_INLINE MacroAssembler::Call JIT::appendCallWithExceptionCheckSetJSValueRe
 {
     MacroAssembler::Call call = appendCallWithExceptionCheck(function);
 #if USE(JSVALUE64)
-    emitPutVirtualRegister(dst, returnValueRegister);
+    emitPutVirtualRegister(dst, returnValueGPR);
 #else
-    emitStore(dst, returnValue2Register, returnValueRegister);
+    emitStore(dst, returnValueGPR2, returnValueGPR);
 #endif
     return call;
 }
@@ -161,9 +161,9 @@ ALWAYS_INLINE MacroAssembler::Call JIT::appendCallWithExceptionCheckSetJSValueRe
     MacroAssembler::Call call = appendCallWithExceptionCheck(function);
     emitValueProfilingSite(regT4);
 #if USE(JSVALUE64)
-    emitPutVirtualRegister(dst, returnValueRegister);
+    emitPutVirtualRegister(dst, returnValueGPR);
 #else
-    emitStore(dst, returnValue2Register, returnValueRegister);
+    emitStore(dst, returnValueGPR2, returnValueGPR);
 #endif
     return call;
 }
index ffa22b9..ce167d3 100644 (file)
@@ -83,8 +83,8 @@ void JIT::emit_op_mov(Instruction* currentInstruction)
 
 void JIT::emit_op_end(Instruction* currentInstruction)
 {
-    RELEASE_ASSERT(returnValueRegister != callFrameRegister);
-    emitGetVirtualRegister(currentInstruction[1].u.operand, returnValueRegister);
+    RELEASE_ASSERT(returnValueGPR != callFrameRegister);
+    emitGetVirtualRegister(currentInstruction[1].u.operand, returnValueGPR);
     restoreReturnAddressBeforeReturn(Address(callFrameRegister, CallFrame::returnPCOffset()));
     ret();
 }
@@ -116,7 +116,7 @@ void JIT::emitSlow_op_new_object(Instruction* currentInstruction, Vector<SlowCas
     int dst = currentInstruction[1].u.operand;
     Structure* structure = currentInstruction[3].u.objectAllocationProfile->structure();
     callOperation(operationNewObject, structure);
-    emitStoreCell(dst, returnValueRegister);
+    emitStoreCell(dst, returnValueGPR);
 }
 
 void JIT::emit_op_check_has_instance(Instruction* currentInstruction)
@@ -268,11 +268,11 @@ void JIT::emit_op_tear_off_arguments(Instruction* currentInstruction)
 void JIT::emit_op_ret(Instruction* currentInstruction)
 {
     ASSERT(callFrameRegister != regT1);
-    ASSERT(regT1 != returnValueRegister);
-    ASSERT(returnValueRegister != callFrameRegister);
+    ASSERT(regT1 != returnValueGPR);
+    ASSERT(returnValueGPR != callFrameRegister);
 
     // Return the result in %eax.
-    emitGetVirtualRegister(currentInstruction[1].u.operand, returnValueRegister);
+    emitGetVirtualRegister(currentInstruction[1].u.operand, returnValueGPR);
 
     // Grab the return address.
     emitGetReturnPCFromCallFrameHeaderPtr(regT1);
@@ -288,13 +288,13 @@ void JIT::emit_op_ret(Instruction* currentInstruction)
 void JIT::emit_op_ret_object_or_this(Instruction* currentInstruction)
 {
     ASSERT(callFrameRegister != regT1);
-    ASSERT(regT1 != returnValueRegister);
-    ASSERT(returnValueRegister != callFrameRegister);
+    ASSERT(regT1 != returnValueGPR);
+    ASSERT(returnValueGPR != callFrameRegister);
 
     // Return the result in %eax.
-    emitGetVirtualRegister(currentInstruction[1].u.operand, returnValueRegister);
-    Jump notJSCell = emitJumpIfNotJSCell(returnValueRegister);
-    loadPtr(Address(returnValueRegister, JSCell::structureOffset()), regT2);
+    emitGetVirtualRegister(currentInstruction[1].u.operand, returnValueGPR);
+    Jump notJSCell = emitJumpIfNotJSCell(returnValueGPR);
+    loadPtr(Address(returnValueGPR, JSCell::structureOffset()), regT2);
     Jump notObject = emitJumpIfNotObject(regT2);
 
     // Grab the return address.
@@ -310,7 +310,7 @@ void JIT::emit_op_ret_object_or_this(Instruction* currentInstruction)
     // Return 'this' in %eax.
     notJSCell.link(this);
     notObject.link(this);
-    emitGetVirtualRegister(currentInstruction[2].u.operand, returnValueRegister);
+    emitGetVirtualRegister(currentInstruction[2].u.operand, returnValueGPR);
 
     // Grab the return address.
     emitGetReturnPCFromCallFrameHeaderPtr(regT1);
@@ -483,7 +483,7 @@ void JIT::emit_op_bitor(Instruction* currentInstruction)
 
 void JIT::emit_op_throw(Instruction* currentInstruction)
 {
-    ASSERT(regT0 == returnValueRegister);
+    ASSERT(regT0 == returnValueGPR);
     emitGetVirtualRegister(currentInstruction[1].u.operand, regT0);
     callOperationNoExceptionCheck(operationThrow, regT0);
     jumpToExceptionHandler();
@@ -511,7 +511,7 @@ void JIT::emit_op_get_pnames(Instruction* currentInstruction)
     // this call doesn't seem to be hot.
     Label isObject(this);
     callOperation(operationGetPNames, regT0);
-    emitStoreCell(dst, returnValueRegister);
+    emitStoreCell(dst, returnValueGPR);
     load32(Address(regT0, OBJECT_OFFSETOF(JSPropertyNameIterator, m_jsStringsSize)), regT3);
     store64(tagTypeNumberRegister, addressFor(i));
     store32(TrustedImm32(Int32Tag), intTagFor(size));
@@ -682,7 +682,7 @@ void JIT::emit_op_switch_imm(Instruction* currentInstruction)
 
     emitGetVirtualRegister(scrutinee, regT0);
     callOperation(operationSwitchImmWithUnknownKeyType, regT0, tableIndex);
-    jump(returnValueRegister);
+    jump(returnValueGPR);
 }
 
 void JIT::emit_op_switch_char(Instruction* currentInstruction)
@@ -698,7 +698,7 @@ void JIT::emit_op_switch_char(Instruction* currentInstruction)
 
     emitGetVirtualRegister(scrutinee, regT0);
     callOperation(operationSwitchCharWithUnknownKeyType, regT0, tableIndex);
-    jump(returnValueRegister);
+    jump(returnValueGPR);
 }
 
 void JIT::emit_op_switch_string(Instruction* currentInstruction)
@@ -713,7 +713,7 @@ void JIT::emit_op_switch_string(Instruction* currentInstruction)
 
     emitGetVirtualRegister(scrutinee, regT0);
     callOperation(operationSwitchStringWithUnknownKeyType, regT0, tableIndex);
-    jump(returnValueRegister);
+    jump(returnValueGPR);
 }
 
 void JIT::emit_op_throw_static_error(Instruction* currentInstruction)
@@ -821,7 +821,7 @@ void JIT::emit_op_create_activation(Instruction* currentInstruction)
     
     Jump activationCreated = branchTest64(NonZero, Address(callFrameRegister, sizeof(Register) * dst));
     callOperation(operationCreateActivation, 0);
-    emitStoreCell(dst, returnValueRegister);
+    emitStoreCell(dst, returnValueGPR);
     activationCreated.link(this);
 }
 
@@ -832,8 +832,8 @@ void JIT::emit_op_create_arguments(Instruction* currentInstruction)
     Jump argsCreated = branchTest64(NonZero, Address(callFrameRegister, sizeof(Register) * dst));
 
     callOperation(operationCreateArguments);
-    emitStoreCell(dst, returnValueRegister);
-    emitStoreCell(unmodifiedArgumentsRegister(VirtualRegister(dst)), returnValueRegister);
+    emitStoreCell(dst, returnValueGPR);
+    emitStoreCell(unmodifiedArgumentsRegister(VirtualRegister(dst)), returnValueGPR);
 
     argsCreated.link(this);
 }
@@ -955,14 +955,14 @@ void JIT::emitSlow_op_jfalse(Instruction* currentInstruction, Vector<SlowCaseEnt
 {
     linkSlowCase(iter);
     callOperation(operationConvertJSValueToBoolean, regT0);
-    emitJumpSlowToHot(branchTest32(Zero, returnValueRegister), currentInstruction[2].u.operand); // inverted!
+    emitJumpSlowToHot(branchTest32(Zero, returnValueGPR), currentInstruction[2].u.operand); // inverted!
 }
 
 void JIT::emitSlow_op_jtrue(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
 {
     linkSlowCase(iter);
     callOperation(operationConvertJSValueToBoolean, regT0);
-    emitJumpSlowToHot(branchTest32(NonZero, returnValueRegister), currentInstruction[2].u.operand);
+    emitJumpSlowToHot(branchTest32(NonZero, returnValueGPR), currentInstruction[2].u.operand);
 }
 
 void JIT::emitSlow_op_bitxor(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
@@ -985,8 +985,8 @@ void JIT::emitSlow_op_eq(Instruction* currentInstruction, Vector<SlowCaseEntry>:
 {
     linkSlowCase(iter);
     callOperation(operationCompareEq, regT0, regT1);
-    emitTagAsBoolImmediate(returnValueRegister);
-    emitPutVirtualRegister(currentInstruction[1].u.operand, returnValueRegister);
+    emitTagAsBoolImmediate(returnValueGPR);
+    emitPutVirtualRegister(currentInstruction[1].u.operand, returnValueGPR);
 }
 
 void JIT::emitSlow_op_neq(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
@@ -994,8 +994,8 @@ void JIT::emitSlow_op_neq(Instruction* currentInstruction, Vector<SlowCaseEntry>
     linkSlowCase(iter);
     callOperation(operationCompareEq, regT0, regT1);
     xor32(TrustedImm32(0x1), regT0);
-    emitTagAsBoolImmediate(returnValueRegister);
-    emitPutVirtualRegister(currentInstruction[1].u.operand, returnValueRegister);
+    emitTagAsBoolImmediate(returnValueGPR);
+    emitPutVirtualRegister(currentInstruction[1].u.operand, returnValueGPR);
 }
 
 void JIT::emitSlow_op_stricteq(Instruction* currentInstruction, Vector<SlowCaseEntry>::iterator& iter)
@@ -1106,8 +1106,8 @@ void JIT::emitSlow_op_get_argument_by_val(Instruction* currentInstruction, Vecto
     linkSlowCase(iter);
     linkSlowCase(iter);
     callOperation(operationCreateArguments);
-    emitStoreCell(arguments, returnValueRegister);
-    emitStoreCell(unmodifiedArgumentsRegister(VirtualRegister(arguments)), returnValueRegister);
+    emitStoreCell(arguments, returnValueGPR);
+    emitStoreCell(unmodifiedArgumentsRegister(VirtualRegister(arguments)), returnValueGPR);
     
     skipArgumentsCreation.link(this);
     emitGetVirtualRegister(arguments, regT0);
@@ -1150,8 +1150,8 @@ void JIT::emitSlow_op_loop_hint(Instruction*, Vector<SlowCaseEntry>::iterator& i
         linkSlowCase(iter);
         
         callOperation(operationOptimize, m_bytecodeOffset);
-        Jump noOptimizedEntry = branchTestPtr(Zero, returnValueRegister);
-        jump(returnValueRegister);
+        Jump noOptimizedEntry = branchTestPtr(Zero, returnValueGPR);
+        jump(returnValueGPR);
         noOptimizedEntry.link(this);
 
         emitJumpSlowToHot(jump(), OPCODE_LENGTH(op_loop_hint));
index 05561cb..266f625 100644 (file)
@@ -176,7 +176,7 @@ JIT::CodeRef JIT::privateCompileCTINativeCall(VM* vm, NativeFunction func)
     addPtr(TrustedImm32(-12), stackPointerRegister);
     push(callFrameRegister);
 #else
-    move(callFrameRegister, firstArgumentRegister);
+    move(callFrameRegister, argumentGPR0);
 #endif
     move(TrustedImmPtr(FunctionPtr(operationVMHandleException).value()), regT3);
     call(regT3);
@@ -210,7 +210,7 @@ void JIT::emit_op_mov(Instruction* currentInstruction)
 
 void JIT::emit_op_end(Instruction* currentInstruction)
 {
-    ASSERT(returnValueRegister != callFrameRegister);
+    ASSERT(returnValueGPR != callFrameRegister);
     emitLoad(currentInstruction[1].u.operand, regT1, regT0);
     restoreReturnAddressBeforeReturn(Address(callFrameRegister, CallFrame::returnPCOffset()));
     ret();
@@ -243,7 +243,7 @@ void JIT::emitSlow_op_new_object(Instruction* currentInstruction, Vector<SlowCas
     int dst = currentInstruction[1].u.operand;
     Structure* structure = currentInstruction[3].u.objectAllocationProfile->structure();
     callOperation(operationNewObject, structure);
-    emitStoreCell(dst, returnValueRegister);
+    emitStoreCell(dst, returnValueGPR);
 }
 
 void JIT::emit_op_check_has_instance(Instruction* currentInstruction)
@@ -508,7 +508,7 @@ void JIT::emitSlow_op_jfalse(Instruction* currentInstruction, Vector<SlowCaseEnt
     }
 
     callOperation(operationConvertJSValueToBoolean, regT1, regT0);
-    emitJumpSlowToHot(branchTest32(Zero, returnValueRegister), target); // Inverted.
+    emitJumpSlowToHot(branchTest32(Zero, returnValueGPR), target); // Inverted.
 }
 
 void JIT::emit_op_jtrue(Instruction* currentInstruction)
@@ -542,7 +542,7 @@ void JIT::emitSlow_op_jtrue(Instruction* currentInstruction, Vector<SlowCaseEntr
     }
 
     callOperation(operationConvertJSValueToBoolean, regT1, regT0);
-    emitJumpSlowToHot(branchTest32(NonZero, returnValueRegister), target);
+    emitJumpSlowToHot(branchTest32(NonZero, returnValueGPR), target);
 }
 
 void JIT::emit_op_jeq_null(Instruction* currentInstruction)
@@ -651,7 +651,7 @@ void JIT::emitSlow_op_eq(Instruction* currentInstruction, Vector<SlowCaseEntry>:
     callOperation(operationCompareEq, regT1, regT0, regT3, regT2);
 
     storeResult.link(this);
-    emitStoreBool(dst, returnValueRegister);
+    emitStoreBool(dst, returnValueGPR);
 }
 
 void JIT::emit_op_neq(Instruction* currentInstruction)
@@ -693,8 +693,8 @@ void JIT::emitSlow_op_neq(Instruction* currentInstruction, Vector<SlowCaseEntry>
     callOperation(operationCompareEq, regT1, regT0, regT3, regT2);
 
     storeResult.link(this);
-    xor32(TrustedImm32(0x1), returnValueRegister);
-    emitStoreBool(dst, returnValueRegister);
+    xor32(TrustedImm32(0x1), returnValueGPR);
+    emitStoreBool(dst, returnValueGPR);
 }
 
 void JIT::compileOpStrictEq(Instruction* currentInstruction, CompileOpStrictEqType type)
@@ -825,7 +825,7 @@ void JIT::emit_op_neq_null(Instruction* currentInstruction)
 
 void JIT::emit_op_throw(Instruction* currentInstruction)
 {
-    ASSERT(regT0 == returnValueRegister);
+    ASSERT(regT0 == returnValueGPR);
     emitLoad(currentInstruction[1].u.operand, regT1, regT0);
     callOperationNoExceptionCheck(operationThrow, regT1, regT0);
     jumpToExceptionHandler();
@@ -853,7 +853,7 @@ void JIT::emit_op_get_pnames(Instruction* currentInstruction)
     // this call doesn't seem to be hot.
     Label isObject(this);
     callOperation(operationGetPNames, regT0);
-    emitStoreCell(dst, returnValueRegister);
+    emitStoreCell(dst, returnValueGPR);
     load32(Address(regT0, OBJECT_OFFSETOF(JSPropertyNameIterator, m_jsStringsSize)), regT3);
     store32(TrustedImm32(Int32Tag), intTagFor(i));
     store32(TrustedImm32(0), intPayloadFor(i));
@@ -1006,7 +1006,7 @@ void JIT::emit_op_switch_imm(Instruction* currentInstruction)
 
     emitLoad(scrutinee, regT1, regT0);
     callOperation(operationSwitchImmWithUnknownKeyType, regT1, regT0, tableIndex);
-    jump(returnValueRegister);
+    jump(returnValueGPR);
 }
 
 void JIT::emit_op_switch_char(Instruction* currentInstruction)
@@ -1022,7 +1022,7 @@ void JIT::emit_op_switch_char(Instruction* currentInstruction)
 
     emitLoad(scrutinee, regT1, regT0);
     callOperation(operationSwitchCharWithUnknownKeyType, regT1, regT0, tableIndex);
-    jump(returnValueRegister);
+    jump(returnValueGPR);
 }
 
 void JIT::emit_op_switch_string(Instruction* currentInstruction)
@@ -1037,7 +1037,7 @@ void JIT::emit_op_switch_string(Instruction* currentInstruction)
 
     emitLoad(scrutinee, regT1, regT0);
     callOperation(operationSwitchStringWithUnknownKeyType, regT1, regT0, tableIndex);
-    jump(returnValueRegister);
+    jump(returnValueGPR);
 }
 
 void JIT::emit_op_throw_static_error(Instruction* currentInstruction)
@@ -1083,7 +1083,7 @@ void JIT::emit_op_create_activation(Instruction* currentInstruction)
     
     Jump activationCreated = branch32(NotEqual, tagFor(activation), TrustedImm32(JSValue::EmptyValueTag));
     callOperation(operationCreateActivation, 0);
-    emitStoreCell(activation, returnValueRegister);
+    emitStoreCell(activation, returnValueGPR);
     activationCreated.link(this);
 }
 
@@ -1093,8 +1093,8 @@ void JIT::emit_op_create_arguments(Instruction* currentInstruction)
 
     Jump argsCreated = branch32(NotEqual, tagFor(dst), TrustedImm32(JSValue::EmptyValueTag));
     callOperation(operationCreateArguments);
-    emitStoreCell(dst, returnValueRegister);
-    emitStoreCell(unmodifiedArgumentsRegister(VirtualRegister(dst)).offset(), returnValueRegister);
+    emitStoreCell(dst, returnValueGPR);
+    emitStoreCell(unmodifiedArgumentsRegister(VirtualRegister(dst)).offset(), returnValueGPR);
     argsCreated.link(this);
 }
 
@@ -1243,8 +1243,8 @@ void JIT::emitSlow_op_get_argument_by_val(Instruction* currentInstruction, Vecto
     linkSlowCase(iter);
 
     callOperation(operationCreateArguments);
-    emitStoreCell(arguments, returnValueRegister);
-    emitStoreCell(unmodifiedArgumentsRegister(VirtualRegister(arguments)).offset(), returnValueRegister);
+    emitStoreCell(arguments, returnValueGPR);
+    emitStoreCell(unmodifiedArgumentsRegister(VirtualRegister(arguments)).offset(), returnValueGPR);
     
     skipArgumentsCreation.link(this);
     emitLoad(arguments, regT1, regT0);
index e19cf41..ac1ab79 100644 (file)
@@ -28,6 +28,8 @@
 
 #include "BytecodeConventions.h"
 #include "CCallHelpers.h"
+#include "FPRInfo.h"
+#include "GPRInfo.h"
 #include "JITCode.h"
 #include "JITOperations.h"
 #include "JITStubs.h"
 #if ENABLE(JIT)
 
 namespace JSC {
-    class JSInterfaceJIT : public CCallHelpers {
+    class JSInterfaceJIT : public CCallHelpers, public GPRInfo, public FPRInfo {
     public:
         JSInterfaceJIT(VM* vm, CodeBlock* codeBlock = 0)
             : CCallHelpers(vm, codeBlock)
         {
         }
-        
-        // NOTES:
-        //
-        // regT0 has two special meanings.  The return value from a stub
-        // call will always be in regT0, and by default (unless
-        // a register is specified) emitPutVirtualRegister() will store
-        // the value from regT0.
-        //
-        // regT3 is required to be callee-preserved.
-        //
-        // tempRegister2 is has no such dependencies.  It is important that
-        // on x86/x86-64 it is ecx for performance reasons, since the
-        // MacroAssembler will need to plant register swaps if it is not -
-        // however the code will still function correctly.
-#if CPU(X86_64)
-        static const RegisterID returnValueRegister = X86Registers::eax;
-        static const RegisterID returnValue2Register = X86Registers::edx;
-        static const RegisterID cachedResultRegister = X86Registers::eax;
-#if !OS(WINDOWS)
-        static const RegisterID firstArgumentRegister = X86Registers::edi;
-        static const RegisterID secondArgumentRegister = X86Registers::esi;
-#else
-        static const RegisterID firstArgumentRegister = X86Registers::ecx;
-        static const RegisterID secondArgumentRegister = X86Registers::edx;
-        static const RegisterID thirdArgumentRegister = X86Registers::r8;
-#endif
-
-        static const RegisterID callFrameRegister = X86Registers::ebp;
-        static const RegisterID tagTypeNumberRegister = X86Registers::r14;
-        static const RegisterID tagMaskRegister = X86Registers::r15;
-
-        static const RegisterID regT0 = X86Registers::eax;
-        static const RegisterID regT1 = X86Registers::edx;
-        static const RegisterID regT2 = X86Registers::ecx;
-        static const RegisterID regT3 = X86Registers::ebx;
-        static const RegisterID regT4 = X86Registers::r10;
-
-        static const FPRegisterID fpRegT0 = X86Registers::xmm0;
-        static const FPRegisterID fpRegT1 = X86Registers::xmm1;
-        static const FPRegisterID fpRegT2 = X86Registers::xmm2;
-        static const FPRegisterID fpRegT3 = X86Registers::xmm3;
-
-        static const RegisterID nonArgGPR1 = X86Registers::eax; // regT0
-#elif CPU(X86)
-        static const RegisterID returnValueRegister = X86Registers::eax;
-        static const RegisterID returnValue2Register = X86Registers::edx;
-        static const RegisterID cachedResultRegister = X86Registers::eax;
-        // On x86 we always use fastcall conventions = but on
-        // OS X if might make more sense to just use regparm.
-        static const RegisterID firstArgumentRegister = X86Registers::ecx;
-        static const RegisterID secondArgumentRegister = X86Registers::edx;
-        
-        static const RegisterID callFrameRegister = X86Registers::ebp;
-        
-        static const RegisterID regT0 = X86Registers::eax;
-        static const RegisterID regT1 = X86Registers::edx;
-        static const RegisterID regT2 = X86Registers::ecx;
-        static const RegisterID regT3 = X86Registers::ebx;
-        static const RegisterID regT4 = X86Registers::esi;
-        
-        static const FPRegisterID fpRegT0 = X86Registers::xmm0;
-        static const FPRegisterID fpRegT1 = X86Registers::xmm1;
-        static const FPRegisterID fpRegT2 = X86Registers::xmm2;
-        static const FPRegisterID fpRegT3 = X86Registers::xmm3;
-#elif CPU(ARM)
-        static const RegisterID returnValueRegister = ARMRegisters::r0;
-        static const RegisterID returnValue2Register = ARMRegisters::r1;
-        static const RegisterID cachedResultRegister = ARMRegisters::r0;
-        static const RegisterID firstArgumentRegister = ARMRegisters::r0;
-        static const RegisterID secondArgumentRegister = ARMRegisters::r1;
-
-        static const RegisterID regT0 = ARMRegisters::r0;
-        static const RegisterID regT1 = ARMRegisters::r1;
-        static const RegisterID regT2 = ARMRegisters::r2;
-        static const RegisterID regT3 = ARMRegisters::r4;
-        static const RegisterID regT4 = ARMRegisters::r7;
-        static const RegisterID regT5 = ARMRegisters::r8;
-
-        static const RegisterID callFrameRegister = ARMRegisters::fp;
-
-        static const FPRegisterID fpRegT0 = ARMRegisters::d0;
-        static const FPRegisterID fpRegT1 = ARMRegisters::d1;
-        static const FPRegisterID fpRegT2 = ARMRegisters::d2;
-        static const FPRegisterID fpRegT3 = ARMRegisters::d3;
-#elif CPU(ARM64)
-        static const RegisterID returnValueRegister = ARM64Registers::x0;
-        static const RegisterID cachedResultRegister = ARM64Registers::x0;
-        static const RegisterID firstArgumentRegister = ARM64Registers::x0;
-        static const RegisterID secondArgumentRegister = ARM64Registers::x1;
-
-#if ENABLE(VALUE_PROFILER)
-        static const RegisterID bucketCounterRegister = ARM64Registers::x7;
-#endif
-
-        static const RegisterID regT0 = ARM64Registers::x0;
-        static const RegisterID regT1 = ARM64Registers::x1;
-        static const RegisterID regT2 = ARM64Registers::x2;
-        static const RegisterID regT3 = ARM64Registers::x23;
-        static const RegisterID regT4 = ARM64Registers::x24;
-        
-        static const RegisterID callFrameRegister = ARM64Registers::fp;
-        static const RegisterID timeoutCheckRegister = ARM64Registers::x26;
-        static const RegisterID tagTypeNumberRegister = ARM64Registers::x27;
-        static const RegisterID tagMaskRegister = ARM64Registers::x28;
-        
-        static const FPRegisterID fpRegT0 = ARM64Registers::q0;
-        static const FPRegisterID fpRegT1 = ARM64Registers::q1;
-        static const FPRegisterID fpRegT2 = ARM64Registers::q2;
-        static const FPRegisterID fpRegT3 = ARM64Registers::q3;
-
-        static const RegisterID nonArgGPR1 = ARM64Registers::x9;
-#elif CPU(MIPS)
-        static const RegisterID returnValueRegister = MIPSRegisters::v0;
-        static const RegisterID returnValue2Register = MIPSRegisters::v1;
-        static const RegisterID cachedResultRegister = MIPSRegisters::v0;
-        static const RegisterID firstArgumentRegister = MIPSRegisters::a0;
-        static const RegisterID secondArgumentRegister = MIPSRegisters::a1;
-        
-        // regT0 must be v0 for returning a 32-bit value.
-        static const RegisterID regT0 = MIPSRegisters::v0;
-        
-        // regT1 must be v1 for returning a pair of 32-bit value.
-        static const RegisterID regT1 = MIPSRegisters::v1;
-        
-        static const RegisterID regT2 = MIPSRegisters::t4;
-        
-        // regT3 must be saved in the callee, so use an S register.
-        static const RegisterID regT3 = MIPSRegisters::s2;
-        
-        static const RegisterID regT4 = MIPSRegisters::t5;
-        static const RegisterID regT5 = MIPSRegisters::t6;
-
-        static const RegisterID callFrameRegister = MIPSRegisters::fp;
-        
-        static const FPRegisterID fpRegT0 = MIPSRegisters::f4;
-        static const FPRegisterID fpRegT1 = MIPSRegisters::f6;
-        static const FPRegisterID fpRegT2 = MIPSRegisters::f8;
-        static const FPRegisterID fpRegT3 = MIPSRegisters::f10;
-#elif CPU(SH4)
-        static const RegisterID callFrameRegister = SH4Registers::fp;
-
-        static const RegisterID regT0 = SH4Registers::r0;
-        static const RegisterID regT1 = SH4Registers::r1;
-        static const RegisterID regT2 = SH4Registers::r2;
-        static const RegisterID regT3 = SH4Registers::r10;
-        static const RegisterID regT4 = SH4Registers::r4;
-        static const RegisterID regT5 = SH4Registers::r5;
-        static const RegisterID regT6 = SH4Registers::r6;
-        static const RegisterID regT7 = SH4Registers::r7;
-        static const RegisterID firstArgumentRegister = regT4;
-        static const RegisterID secondArgumentRegister = regT5;
-
-        static const RegisterID returnValueRegister = SH4Registers::r0;
-        static const RegisterID returnValue2Register = SH4Registers::r1;
-        static const RegisterID cachedResultRegister = SH4Registers::r0;
-
-        static const FPRegisterID fpRegT0 = SH4Registers::dr0;
-        static const FPRegisterID fpRegT1 = SH4Registers::dr2;
-        static const FPRegisterID fpRegT2 = SH4Registers::dr4;
-        static const FPRegisterID fpRegT3 = SH4Registers::dr6;
-        static const FPRegisterID fpRegT4 = SH4Registers::dr8;
-        static const FPRegisterID fpRegT5 = SH4Registers::dr10;
-#else
-#error "JIT not supported on this platform."
-#endif
 
 #if USE(JSVALUE32_64)
         // Can't just propogate JSValue::Int32Tag as visual studio doesn't like it
index 522e02f..090a4ad 100644 (file)
@@ -55,12 +55,12 @@ public:
         m_jit->push(JIT::callFrameRegister);
 #elif CPU(X86_64) && OS(WINDOWS)
         m_jit->addPtr(MacroAssembler::TrustedImm32(-16), MacroAssembler::stackPointerRegister);
-        m_jit->move(MacroAssembler::stackPointerRegister, JIT::firstArgumentRegister);
-        m_jit->move(JIT::callFrameRegister, JIT::secondArgumentRegister);
-        m_jit->move(JIT::TrustedImmPtr(m_pc), JIT::thirdArgumentRegister);
+        m_jit->move(MacroAssembler::stackPointerRegister, JIT::argumentGPR0);
+        m_jit->move(JIT::callFrameRegister, JIT::argumentGPR1);
+        m_jit->move(JIT::TrustedImmPtr(m_pc), JIT::argumentGPR2);
 #else
-        m_jit->move(JIT::callFrameRegister, JIT::firstArgumentRegister);
-        m_jit->move(JIT::TrustedImmPtr(m_pc), JIT::secondArgumentRegister);
+        m_jit->move(JIT::callFrameRegister, JIT::argumentGPR0);
+        m_jit->move(JIT::TrustedImmPtr(m_pc), JIT::argumentGPR1);
 #endif
         JIT::Call call = m_jit->call();
         m_jit->m_calls.append(CallRecord(call, m_jit->m_bytecodeOffset, m_stub.value()));
index 9a0ec1e..ad6b9e1 100644 (file)
@@ -717,7 +717,7 @@ static MacroAssemblerCodeRef nativeForGenerator(VM* vm, CodeSpecializationKind k
     jit.addPtr(JSInterfaceJIT::TrustedImm32(-12), JSInterfaceJIT::stackPointerRegister);
     jit.push(JSInterfaceJIT::callFrameRegister);
 #else
-    jit.move(JSInterfaceJIT::callFrameRegister, JSInterfaceJIT::firstArgumentRegister);
+    jit.move(JSInterfaceJIT::callFrameRegister, JSInterfaceJIT::argumentGPR0);
 #endif
     jit.move(JSInterfaceJIT::TrustedImmPtr(FunctionPtr(operationVMHandleException).value()), JSInterfaceJIT::regT3);
     jit.call(JSInterfaceJIT::regT3);