Simplify JIT::emit_op_mod()

https://bugs.webkit.org/show_bug.cgi?id=148908

Patch by Sukolsak Sakshuwong <sukolsak@gmail.com> on 2015-09-06
Reviewed by Michael Saboff.

The IDIV instruction on x86 divides the value in the EDX:EAX registers
by the source operand and stores the quotient in EAX and the remainder
in EDX. Therefore, we store the values that we don't want to be
overwritten by IDIV in registers that are not EAX or EDX. This patch
makes the intention clearer and makes the code easier to read.

* jit/JITArithmetic.cpp:
(JSC::JIT::emit_op_mod):

git-svn-id: https://svn.webkit.org/repository/webkit/trunk@189444 268f45cc-cd09-0410-ab3c-d52691b4dbfc

diff --git a/Source/JavaScriptCore/ChangeLog b/Source/JavaScriptCore/ChangeLog
index a8d6b5b..fce5ee1 100644 (file)
--- a/Source/JavaScriptCore/ChangeLog
+++ b/Source/JavaScriptCore/ChangeLog
@@ -1,3 +1,19 @@
+2015-09-06  Sukolsak Sakshuwong  <sukolsak@gmail.com>
+
+        Simplify JIT::emit_op_mod()
+        https://bugs.webkit.org/show_bug.cgi?id=148908
+
+        Reviewed by Michael Saboff.
+
+        The IDIV instruction on x86 divides the value in the EDX:EAX registers
+        by the source operand and stores the quotient in EAX and the remainder
+        in EDX. Therefore, we store the values that we don't want to be
+        overwritten by IDIV in registers that are not EAX or EDX. This patch
+        makes the intention clearer and makes the code easier to read.
+
+        * jit/JITArithmetic.cpp:
+        (JSC::JIT::emit_op_mod):
+
 2015-09-05  Mark Lam  <mark.lam@apple.com>
 
         Fix JSDollarVMPrototype after r189160.

diff --git a/Source/JavaScriptCore/jit/JITArithmetic.cpp b/Source/JavaScriptCore/jit/JITArithmetic.cpp
index 50671e2..f1889cf 100644 (file)
--- a/Source/JavaScriptCore/jit/JITArithmetic.cpp
+++ b/Source/JavaScriptCore/jit/JITArithmetic.cpp
@@ -611,19 +611,11 @@ void JIT::emit_op_mod(Instruction* currentInstruction)
     int op2 = currentInstruction[3].u.operand;
 
     // Make sure registers are correct for x86 IDIV instructions.
-#if CPU(X86)
-    auto edx = regT1;
-    auto ecx = regT2;
-#elif OS(WINDOWS)
-    auto edx = regT1;
-    auto ecx = regT5;
-#else
-    auto edx = regT2;
-    auto ecx = regT3;
-#endif
     ASSERT(regT0 == X86Registers::eax);
-    ASSERT(edx == X86Registers::edx);
-    ASSERT(ecx == X86Registers::ecx);
+    auto edx = X86Registers::edx;
+    auto ecx = X86Registers::ecx;
+    ASSERT(regT4 != edx);
+    ASSERT(regT4 != ecx);
 
     emitGetVirtualRegisters(op1, regT4, op2, ecx);
     emitJumpSlowCaseIfNotImmediateInteger(regT4);